The Bias Circuit Design of High Gain High Frequency OTA

碩士 === 國立中山大學 === 電機工程學系研究所 === 96 === In this thesis, we use the no-capacitor feed-forward (NCFF) compensation scheme which employs a feed-forward path to obtain high gain, high frequency. We use CMFB circuit to adjust the common-mode output voltages and the bias circuit. The CMFB circuit makes the...

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Bibliographic Details
Main Authors: Chi-Chuan Luo, 羅濟釧
Other Authors: Chia-Hsiung Kao
Format: Others
Language:en_US
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/2tqtk6
Description
Summary:碩士 === 國立中山大學 === 電機工程學系研究所 === 96 === In this thesis, we use the no-capacitor feed-forward (NCFF) compensation scheme which employs a feed-forward path to obtain high gain, high frequency. We use CMFB circuit to adjust the common-mode output voltages and the bias circuit. The CMFB circuit makes the output accurately to the reference voltage. The circuit was designed and fabricated TSMC 0.35 μm CMOS process. The dc gain is around 90dB and the cut-off frequency is 1GHz. The supply voltage is ±1.25V. The output voltage is smaller than 10mV.