Designs, Implementations and Applications of Floating-Point Trigonometric Function Units

碩士 === 國立中山大學 === 資訊工程學系研究所 === 96 === In addition to the previous pipelined floating-point CORDIC design, three different architectures supporting both CORDIC rotation mode and vectoring mode are proposed in this thesis. Detailed analysis and comparison of these architectures are addressed in order...

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Main Authors: Hsin-mau Lee, 李昕懋
Other Authors: Shen-Fu Hsiao
Format: Others
Language:zh-TW
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/j8vhqu
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spelling ndltd-TW-096NSYS53920702018-05-18T04:28:47Z http://ndltd.ncl.edu.tw/handle/j8vhqu Designs, Implementations and Applications of Floating-Point Trigonometric Function Units 浮點格式三角函數功能單元之設計、實作和應用 Hsin-mau Lee 李昕懋 碩士 國立中山大學 資訊工程學系研究所 96 In addition to the previous pipelined floating-point CORDIC design, three different architectures supporting both CORDIC rotation mode and vectoring mode are proposed in this thesis. Detailed analysis and comparison of these architectures are addressed in order to choose the best architecture with minimized area cost and computation latency given the required bit accuracy. Based on the comparison, we have chosen the best architecture and implemented an IEEE single precision floating-point CORDIC processor. The mathematical analysis of the computation errors is done to minimize the bit width of the composing arithmetic components during implementation. The comparison results of different architectures also serve as a general guideline for the design of floating-point sine/cosine units. Finally, we study the application of the floating-point CORDIC to 3D graphics acceleration. Shen-Fu Hsiao 蕭勝夫 2008 學位論文 ; thesis 117 zh-TW
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language zh-TW
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description 碩士 === 國立中山大學 === 資訊工程學系研究所 === 96 === In addition to the previous pipelined floating-point CORDIC design, three different architectures supporting both CORDIC rotation mode and vectoring mode are proposed in this thesis. Detailed analysis and comparison of these architectures are addressed in order to choose the best architecture with minimized area cost and computation latency given the required bit accuracy. Based on the comparison, we have chosen the best architecture and implemented an IEEE single precision floating-point CORDIC processor. The mathematical analysis of the computation errors is done to minimize the bit width of the composing arithmetic components during implementation. The comparison results of different architectures also serve as a general guideline for the design of floating-point sine/cosine units. Finally, we study the application of the floating-point CORDIC to 3D graphics acceleration.
author2 Shen-Fu Hsiao
author_facet Shen-Fu Hsiao
Hsin-mau Lee
李昕懋
author Hsin-mau Lee
李昕懋
spellingShingle Hsin-mau Lee
李昕懋
Designs, Implementations and Applications of Floating-Point Trigonometric Function Units
author_sort Hsin-mau Lee
title Designs, Implementations and Applications of Floating-Point Trigonometric Function Units
title_short Designs, Implementations and Applications of Floating-Point Trigonometric Function Units
title_full Designs, Implementations and Applications of Floating-Point Trigonometric Function Units
title_fullStr Designs, Implementations and Applications of Floating-Point Trigonometric Function Units
title_full_unstemmed Designs, Implementations and Applications of Floating-Point Trigonometric Function Units
title_sort designs, implementations and applications of floating-point trigonometric function units
publishDate 2008
url http://ndltd.ncl.edu.tw/handle/j8vhqu
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