Memory Allocation of 3D Graphics Data for a 3D Hardware Accelerator

碩士 === 國立中山大學 === 資訊工程學系研究所 === 96 === Hardware implementation is one of common solutions for accelerating 3D Graphics Pipelining Application. In this thesis, our purpose is to probe into the effect of 3D graphics system performance, according to the memory allocation of 3D graphics data and bus arc...

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Bibliographic Details
Main Authors: Hung-Yu Chen, 陳虹宇
Other Authors: Ing-Jer Huang
Format: Others
Language:zh-TW
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/2nw867

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