Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A

碩士 === 國立宜蘭大學 === 電子工程學系碩士班 === 96 === Non-volatile memory (NVM) has been very popular for data storage. The continuous scaling of MOSFET is a challenging task due to physical limitations, so developing a new memory device is important. The phase change memory (PCM) has been a promising candidate fo...

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Main Authors:	Yi-Bo Liao, 廖翊博
Other Authors:	Meng-Hsueh Chiang
Format:	Others
Language:	zh-TW
Published:	2008
Online Access:	http://ndltd.ncl.edu.tw/handle/06799417656002571077

id	ndltd-TW-096NIU07428011
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spelling	ndltd-TW-096NIU074280112016-05-16T04:10:39Z http://ndltd.ncl.edu.tw/handle/06799417656002571077 Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A 運用Verilog-A實現的相變化記憶體溫度變化模型 Yi-Bo Liao 廖翊博碩士國立宜蘭大學電子工程學系碩士班 96 Non-volatile memory (NVM) has been very popular for data storage. The continuous scaling of MOSFET is a challenging task due to physical limitations, so developing a new memory device is important. The phase change memory (PCM) has been a promising candidate for next generation memory device. In this thesis, we developed PCM SPICE compact model using Verilog-A. There are two phase states of the PCM which can store the digital data. Different current pulses can generate heat levels to change phase of the PCM. The physical compact model discussed in this thesis includes the theories of Joule heating, thermal dissIpation and crystalline fraction, and it is accurate and predictive. As PCM technology is emerging, the predictive compact model can expedite the novel technology development. Meng-Hsueh Chiang 江孟學 2008 學位論文 ; thesis 64 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	碩士 === 國立宜蘭大學 === 電子工程學系碩士班 === 96 === Non-volatile memory (NVM) has been very popular for data storage. The continuous scaling of MOSFET is a challenging task due to physical limitations, so developing a new memory device is important. The phase change memory (PCM) has been a promising candidate for next generation memory device. In this thesis, we developed PCM SPICE compact model using Verilog-A. There are two phase states of the PCM which can store the digital data. Different current pulses can generate heat levels to change phase of the PCM. The physical compact model discussed in this thesis includes the theories of Joule heating, thermal dissIpation and crystalline fraction, and it is accurate and predictive. As PCM technology is emerging, the predictive compact model can expedite the novel technology development.
author2	Meng-Hsueh Chiang
author_facet	Meng-Hsueh Chiang Yi-Bo Liao 廖翊博
author	Yi-Bo Liao 廖翊博
spellingShingle	Yi-Bo Liao 廖翊博 Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A
author_sort	Yi-Bo Liao
title	Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A
title_short	Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A
title_full	Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A
title_fullStr	Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A
title_full_unstemmed	Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A
title_sort	implementation of temperature-based phase change memory model using verilog-a
publishDate	2008
url	http://ndltd.ncl.edu.tw/handle/06799417656002571077
work_keys_str_mv	AT yiboliao implementationoftemperaturebasedphasechangememorymodelusingveriloga AT liàoyìbó implementationoftemperaturebasedphasechangememorymodelusingveriloga AT yiboliao yùnyòngverilogashíxiàndexiāngbiànhuàjìyìtǐwēndùbiànhuàmóxíng AT liàoyìbó yùnyòngverilogashíxiàndexiāngbiànhuàjìyìtǐwēndùbiànhuàmóxíng
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Implementation of Temperature-Based Phase Change Memory Model Using Verilog-A

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