High-Reliability Built-in Self-Detecting/Correcting Architecture for Motion Estimation Computing Array

碩士 === 國立東華大學 === 電機工程學系 === 96 === In the past year, following the capacity of multi-media storage and technology were improved, the applications of multi-media moved towards to a time of high quality and high resolution. Also in high quality of video compression, the MPEG-1 to MPEG-4 in 2003, all...

Full description

Bibliographic Details
Main Authors: Yu Liu, 劉羽
Other Authors: Chun-Lung Hsu
Format: Others
Language:zh-TW
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/dbceck
id ndltd-TW-096NDHU5442009
record_format oai_dc
spelling ndltd-TW-096NDHU54420092019-05-15T19:39:21Z http://ndltd.ncl.edu.tw/handle/dbceck High-Reliability Built-in Self-Detecting/Correcting Architecture for Motion Estimation Computing Array 應用於移動估測計算陣列的高可靠度內建自我測試/回復架構設計 Yu Liu 劉羽 碩士 國立東華大學 電機工程學系 96 In the past year, following the capacity of multi-media storage and technology were improved, the applications of multi-media moved towards to a time of high quality and high resolution. Also in high quality of video compression, the MPEG-1 to MPEG-4 in 2003, all emphasized the high quality of video and low bit-rate. Not only the higher compression quality was appeared that was H.264 video coding but also the H.264 provided more outstanding compression quality than other standards of video coding. In the above mentioned, the motion estimation (ME) was a very important core block in video coding. Also, the core block was called motion estimation computing array (MECA) that was used to remove the redundant of frame to frame to achieve the high compression rate. But the computing of MECA had a great quantity and needed a lot of time. In order to increase the speed of computing, a lot of element array (PE array) was unable to avoid, especially in high video resolution such as Video CD, DVD, HDTV…etc. Hence, we face this so important and enormous process unit, the problem of testable design became more and more important. This thesis develops a built-in self-detecting / correcting (BISDC) architecture design for motion estimation computing array (MECA). Based on the error-detecting / correcting concepts of bi-residue arithmetic codes and low cost remainder and quotient (RQ) arithmetic codes, any error of each processing element (PE) in MECA can be effectively detected and corrected on-line by using the proposed built-in self-detecting (BISD) and built-in self-correcting (BISC) circuits, respectively. Performance analysis and evaluation show the proposed BISDC architecture has little area overhead, timing penalty and very low throughput loss. Chun-Lung Hsu 許鈞瓏 2008 學位論文 ; thesis 67 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立東華大學 === 電機工程學系 === 96 === In the past year, following the capacity of multi-media storage and technology were improved, the applications of multi-media moved towards to a time of high quality and high resolution. Also in high quality of video compression, the MPEG-1 to MPEG-4 in 2003, all emphasized the high quality of video and low bit-rate. Not only the higher compression quality was appeared that was H.264 video coding but also the H.264 provided more outstanding compression quality than other standards of video coding. In the above mentioned, the motion estimation (ME) was a very important core block in video coding. Also, the core block was called motion estimation computing array (MECA) that was used to remove the redundant of frame to frame to achieve the high compression rate. But the computing of MECA had a great quantity and needed a lot of time. In order to increase the speed of computing, a lot of element array (PE array) was unable to avoid, especially in high video resolution such as Video CD, DVD, HDTV…etc. Hence, we face this so important and enormous process unit, the problem of testable design became more and more important. This thesis develops a built-in self-detecting / correcting (BISDC) architecture design for motion estimation computing array (MECA). Based on the error-detecting / correcting concepts of bi-residue arithmetic codes and low cost remainder and quotient (RQ) arithmetic codes, any error of each processing element (PE) in MECA can be effectively detected and corrected on-line by using the proposed built-in self-detecting (BISD) and built-in self-correcting (BISC) circuits, respectively. Performance analysis and evaluation show the proposed BISDC architecture has little area overhead, timing penalty and very low throughput loss.
author2 Chun-Lung Hsu
author_facet Chun-Lung Hsu
Yu Liu
劉羽
author Yu Liu
劉羽
spellingShingle Yu Liu
劉羽
High-Reliability Built-in Self-Detecting/Correcting Architecture for Motion Estimation Computing Array
author_sort Yu Liu
title High-Reliability Built-in Self-Detecting/Correcting Architecture for Motion Estimation Computing Array
title_short High-Reliability Built-in Self-Detecting/Correcting Architecture for Motion Estimation Computing Array
title_full High-Reliability Built-in Self-Detecting/Correcting Architecture for Motion Estimation Computing Array
title_fullStr High-Reliability Built-in Self-Detecting/Correcting Architecture for Motion Estimation Computing Array
title_full_unstemmed High-Reliability Built-in Self-Detecting/Correcting Architecture for Motion Estimation Computing Array
title_sort high-reliability built-in self-detecting/correcting architecture for motion estimation computing array
publishDate 2008
url http://ndltd.ncl.edu.tw/handle/dbceck
work_keys_str_mv AT yuliu highreliabilitybuiltinselfdetectingcorrectingarchitectureformotionestimationcomputingarray
AT liúyǔ highreliabilitybuiltinselfdetectingcorrectingarchitectureformotionestimationcomputingarray
AT yuliu yīngyòngyúyídònggūcèjìsuànzhènlièdegāokěkàodùnèijiànzìwǒcèshìhuífùjiàgòushèjì
AT liúyǔ yīngyòngyúyídònggūcèjìsuànzhènlièdegāokěkàodùnèijiànzìwǒcèshìhuífùjiàgòushèjì
_version_ 1719093582767325184