The key components of CMOS RF front-end with current-reused approach

• Main Authors: Chih-Wei Huang, 黃智偉
• Other Authors: Shyh-Jong Chung
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/30470741266499149737

碩士 === 國立交通大學 === 電信工程系所 === 96 === The thesis consists of three parts: low noise amplifier, LNA with notch filters and low-power oscillator mixer. These propose circuits are fabricated using a standard TSMC 0.18 um RF CMOS process technology. The first part of the thesis is the low power design of low noise amplifier with notch filters. The measurement result of LNA shows the power gain is more than 9.5dB in 3~10GHz, return loss is under -5.4dB, NFmin is 2.6dB, and power consumption exclude buffer is 6.8 mW. Then, we use the design of the miniaturized notch filters realized by active inductor, applied in the integration of LNA. The core area of LNA and notch filters is only 0.0016 mm2. The measurement result of LNA with notch filter shows the power gain is 8~12dB, return loss is under -7.5dB. The suppressed performance of notch filters in 2.5GHz and 5.2 GHz are 19dB and 38dB. The power consumption is 10.3 mW. The simulation results of minimum noise figure and P1dB are 2dB and -14.2dB. The last part describes the combination of VCO and mixer. The circuit uses current-reuse to reach low power consumption, and furthermore a balun is integrated in this design. The total schematic contains mixer, VCO, and on-chip balun. The chip area is 1mmx1.5mm. The simulation results show the conversion gain are 15dB, return loss is under -12dB, P1dB is -16dB. The phase noise is -105 dBc/MHz. The total power consumption is 6mW.