A Register and Channel Allocation Algorithm for Interconnect Resource Sharing on Multicycle Communication Architecture
碩士 === 國立交通大學 === 電子工程系所 === 96 ===
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Online Access: | http://ndltd.ncl.edu.tw/handle/50290778060405773647 |
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ndltd-TW-096NCTU54282192015-10-13T16:13:47Z http://ndltd.ncl.edu.tw/handle/50290778060405773647 A Register and Channel Allocation Algorithm for Interconnect Resource Sharing on Multicycle Communication Architecture 應用於多週期通訊架構上達成互連資源共享之通道與暫存器配置演算法 洪玉如 碩士 國立交通大學 電子工程系所 96 黃俊達 2007 學位論文 ; thesis 54 en_US |
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en_US |
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Others
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碩士 === 國立交通大學 === 電子工程系所 === 96 ===
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author2 |
黃俊達 |
author_facet |
黃俊達 洪玉如 |
author |
洪玉如 |
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洪玉如 A Register and Channel Allocation Algorithm for Interconnect Resource Sharing on Multicycle Communication Architecture |
author_sort |
洪玉如 |
title |
A Register and Channel Allocation Algorithm for Interconnect Resource Sharing on Multicycle Communication Architecture |
title_short |
A Register and Channel Allocation Algorithm for Interconnect Resource Sharing on Multicycle Communication Architecture |
title_full |
A Register and Channel Allocation Algorithm for Interconnect Resource Sharing on Multicycle Communication Architecture |
title_fullStr |
A Register and Channel Allocation Algorithm for Interconnect Resource Sharing on Multicycle Communication Architecture |
title_full_unstemmed |
A Register and Channel Allocation Algorithm for Interconnect Resource Sharing on Multicycle Communication Architecture |
title_sort |
register and channel allocation algorithm for interconnect resource sharing on multicycle communication architecture |
publishDate |
2007 |
url |
http://ndltd.ncl.edu.tw/handle/50290778060405773647 |
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AT hóngyùrú aregisterandchannelallocationalgorithmforinterconnectresourcesharingonmulticyclecommunicationarchitecture AT hóngyùrú yīngyòngyúduōzhōuqītōngxùnjiàgòushàngdáchénghùliánzīyuángòngxiǎngzhītōngdàoyǔzàncúnqìpèizhìyǎnsuànfǎ AT hóngyùrú registerandchannelallocationalgorithmforinterconnectresourcesharingonmulticyclecommunicationarchitecture |
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