An improved Interface Traps Profiling on the Study of Reliability in Strained CMOS Devices
碩士 === 國立交通大學 === 電子工程系所 === 96 === For the first time, an improved DC-IV measurement has been developed for the reliability study of devices with EOT down to 13A0, and also a new interface-trap lateral-profiling technique has been built. It can be used to accurately profile the interface traps dist...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/08979804903200495387 |