Study on the Polycrystalline Silicon Thin-Film Transistors with Location-Controlled Grain Boundary and Multi-Gate Stucture Using Excimer Laser Annealing
碩士 === 國立交通大學 === 電子工程系所 === 96 === In recent years, polycrystalline silicon (poly-Si) thin film transistors (TFTs) were the key devices in flat-panel display technology and System on a Panel (SOP) applications due to its high mobility. Although conventional excimer laser can transfer amorphous Si t...
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碩士 === 國立交通大學 === 電子工程系所 === 96 === In recent years, polycrystalline silicon (poly-Si) thin film transistors (TFTs) were the key devices in flat-panel display technology and System on a Panel (SOP) applications due to its high mobility. Although conventional excimer laser can transfer amorphous Si to polycrystalline Si in order to fabricate poly-Si TFTs. There were still some disadvantages such as narrow laser process window, random small grain and grain boundaries, and etc.. In this thesis, therefore, we proposed a method, which is so called Recessed-Channel with Oxide Step method, to control the grain growth and grain boundary. With the benefits of this crystallization method and multi-gate structure, high performance multi-gate poly-Si TFTs had been fabricated with no main grain boundary in the channel region.
At the first part, single grain boundary (SGB) thin film transistors (TFTs) fabricated by excimer laser annealing were investigated. The crystallization mechanisms of valley region and ridge region of Recess-Channel with Oxide Step method were studied. A thick amorphous silicon region was formed in the sidewall of oxide step which acted as the seeds for the grain lateral growth during excimer laser irradiation. As the excimer energy density was controlled to completely melt the amorphous silicon thin film of valley region and partially melt the thick part in the sidewall of the oxide step. The lateral growth grain would be observed in the valley region. When laser irradiated the ridge region with channel length of 2 μm, the holding time of thermal energy of the edge of the ridge region was longer than that of the center of the ridge region. There were small grains in the middle of the ridge region, and the small grains obstructed the growth of the lateral grains from the sidewall to the center. We decreased the length of the ridge region to 1.5 μm, the phenomenon of grain obstruction would be eliminated. Therefore, the lateral growth grain starting from un-melt silicon seeds could extend along the opposite direction toward the complete melt valley region and ridge region. Thus, a uniform and large grain of polycrystalline silicon film would lead to improved device performance. According to the analysis of scanning electron microscope (SEM) and atomic force microscope (AFM), large longitudinal grains were observed to be about 1.5 μm in valley region and about 0.75 μm in ridge region. The electrical characteristics of single grain boundary TFTs fabricated by Recessed-Channel with Oxide Step TFTs were also investigated. High performance p-type SGB-TFTs with field-effect mobility reaching 168 cm2/V-s had been fabricated without any hydrogenation treatment. The subtheshold swing and drain-induced-barrier-lowing (DIBL) of SGB-TFTs were 0.226 V/decade and 310 mV respectively. In addition, the electrical characteristics of devices located on the valley region and ridge region were studied. While the length of ridge region was 2μm, there was a small grain region in the middle of ridge region. Because the crystalline of ridge region of poly-Si thin film was defective, the electrical characteristics of devices located on ridge region were poorer than that of devices located on valley region. The field-effect mobility of devices located on ridge region was 99 cm2/V-s.
Although SGB-TFTs exhibited high performance, the electrical characteristics of SGB-TFTs were affected by the single main grain boundary located in device channel. Hence, we introduced the multi-gate (MG) structure to eliminate the single grain boundary effect and investigated the electrical characteristics of multi-gate TFTs in order to avoid the single main grain boundary in the channel. High performance p-type MG-TFTs with field-effect mobility exceeding 190 cm2/V-s had been fabricated without any hydrogenation treatment. The characteristics of twenty MG-TFTs devices were taken into discussion. The standard deviation of equivalent field-effect mobility was smaller than 30 cm2/V-s and the standard deviation of Vth was smaller than 0.78 V, while that of subthreshold swing was smaller than 0.113 V/decade. By means of multi-gate structure, the steeper subthreshold swing reaching 0.164V/decade was obtained. Furthermore, MG-TFTs provided 6 times higher driving current than conventional TFTs.
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author2 |
Huang-Chung Cheng |
author_facet |
Huang-Chung Cheng Syu-Heng Lee 李序恆 |
author |
Syu-Heng Lee 李序恆 |
spellingShingle |
Syu-Heng Lee 李序恆 Study on the Polycrystalline Silicon Thin-Film Transistors with Location-Controlled Grain Boundary and Multi-Gate Stucture Using Excimer Laser Annealing |
author_sort |
Syu-Heng Lee |
title |
Study on the Polycrystalline Silicon Thin-Film Transistors with Location-Controlled Grain Boundary and Multi-Gate Stucture Using Excimer Laser Annealing |
title_short |
Study on the Polycrystalline Silicon Thin-Film Transistors with Location-Controlled Grain Boundary and Multi-Gate Stucture Using Excimer Laser Annealing |
title_full |
Study on the Polycrystalline Silicon Thin-Film Transistors with Location-Controlled Grain Boundary and Multi-Gate Stucture Using Excimer Laser Annealing |
title_fullStr |
Study on the Polycrystalline Silicon Thin-Film Transistors with Location-Controlled Grain Boundary and Multi-Gate Stucture Using Excimer Laser Annealing |
title_full_unstemmed |
Study on the Polycrystalline Silicon Thin-Film Transistors with Location-Controlled Grain Boundary and Multi-Gate Stucture Using Excimer Laser Annealing |
title_sort |
study on the polycrystalline silicon thin-film transistors with location-controlled grain boundary and multi-gate stucture using excimer laser annealing |
url |
http://ndltd.ncl.edu.tw/handle/4zekmh |
work_keys_str_mv |
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ndltd-TW-096NCTU54282102019-05-15T19:28:27Z http://ndltd.ncl.edu.tw/handle/4zekmh Study on the Polycrystalline Silicon Thin-Film Transistors with Location-Controlled Grain Boundary and Multi-Gate Stucture Using Excimer Laser Annealing 以準分子雷射退火製作控制晶界位置之多閘極複晶矽薄膜電晶體之研究 Syu-Heng Lee 李序恆 碩士 國立交通大學 電子工程系所 96 In recent years, polycrystalline silicon (poly-Si) thin film transistors (TFTs) were the key devices in flat-panel display technology and System on a Panel (SOP) applications due to its high mobility. Although conventional excimer laser can transfer amorphous Si to polycrystalline Si in order to fabricate poly-Si TFTs. There were still some disadvantages such as narrow laser process window, random small grain and grain boundaries, and etc.. In this thesis, therefore, we proposed a method, which is so called Recessed-Channel with Oxide Step method, to control the grain growth and grain boundary. With the benefits of this crystallization method and multi-gate structure, high performance multi-gate poly-Si TFTs had been fabricated with no main grain boundary in the channel region. At the first part, single grain boundary (SGB) thin film transistors (TFTs) fabricated by excimer laser annealing were investigated. The crystallization mechanisms of valley region and ridge region of Recess-Channel with Oxide Step method were studied. A thick amorphous silicon region was formed in the sidewall of oxide step which acted as the seeds for the grain lateral growth during excimer laser irradiation. As the excimer energy density was controlled to completely melt the amorphous silicon thin film of valley region and partially melt the thick part in the sidewall of the oxide step. The lateral growth grain would be observed in the valley region. When laser irradiated the ridge region with channel length of 2 μm, the holding time of thermal energy of the edge of the ridge region was longer than that of the center of the ridge region. There were small grains in the middle of the ridge region, and the small grains obstructed the growth of the lateral grains from the sidewall to the center. We decreased the length of the ridge region to 1.5 μm, the phenomenon of grain obstruction would be eliminated. Therefore, the lateral growth grain starting from un-melt silicon seeds could extend along the opposite direction toward the complete melt valley region and ridge region. Thus, a uniform and large grain of polycrystalline silicon film would lead to improved device performance. According to the analysis of scanning electron microscope (SEM) and atomic force microscope (AFM), large longitudinal grains were observed to be about 1.5 μm in valley region and about 0.75 μm in ridge region. The electrical characteristics of single grain boundary TFTs fabricated by Recessed-Channel with Oxide Step TFTs were also investigated. High performance p-type SGB-TFTs with field-effect mobility reaching 168 cm2/V-s had been fabricated without any hydrogenation treatment. The subtheshold swing and drain-induced-barrier-lowing (DIBL) of SGB-TFTs were 0.226 V/decade and 310 mV respectively. In addition, the electrical characteristics of devices located on the valley region and ridge region were studied. While the length of ridge region was 2μm, there was a small grain region in the middle of ridge region. Because the crystalline of ridge region of poly-Si thin film was defective, the electrical characteristics of devices located on ridge region were poorer than that of devices located on valley region. The field-effect mobility of devices located on ridge region was 99 cm2/V-s. Although SGB-TFTs exhibited high performance, the electrical characteristics of SGB-TFTs were affected by the single main grain boundary located in device channel. Hence, we introduced the multi-gate (MG) structure to eliminate the single grain boundary effect and investigated the electrical characteristics of multi-gate TFTs in order to avoid the single main grain boundary in the channel. High performance p-type MG-TFTs with field-effect mobility exceeding 190 cm2/V-s had been fabricated without any hydrogenation treatment. The characteristics of twenty MG-TFTs devices were taken into discussion. The standard deviation of equivalent field-effect mobility was smaller than 30 cm2/V-s and the standard deviation of Vth was smaller than 0.78 V, while that of subthreshold swing was smaller than 0.113 V/decade. By means of multi-gate structure, the steeper subthreshold swing reaching 0.164V/decade was obtained. Furthermore, MG-TFTs provided 6 times higher driving current than conventional TFTs. Huang-Chung Cheng 鄭晃忠 學位論文 ; thesis 97 en_US |