A Tri-mode MIMO Equalizer Design for OFDM Based Wireless LANs
碩士 === 國立交通大學 === 電子工程系所 === 96 === In this thesis, an efficient hardware architecture for tri-mode equalizer with two transmit and two receive antennas is proposed. The proposed tri-mode equalizer supports SISO, SDM-MIMO and STBC-MIMO for wireless LANs is designed. Considering the effects of carrie...
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| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/03137861495031188331 |
| Summary: | 碩士 === 國立交通大學 === 電子工程系所 === 96 === In this thesis, an efficient hardware architecture for tri-mode equalizer with two transmit and two receive antennas is proposed. The proposed tri-mode equalizer supports SISO, SDM-MIMO and STBC-MIMO for wireless LANs is designed. Considering the effects of carrier frequency offset (CFO), an effective CFO mitigation method is proposed to reduce the channel estimation error caused by residual CFO. Then, an effective CFO tracking algorithm is also proposed to enhance packet error rate (PER) performance.
Simulation results show that the proposed CFO mitigation and tracking algorithm can effectively suppress the PER performance loss due to residual CFO within 0.2 dB in the 2x2 multi-input multi-output (MIMO) system. For practical implementation, a lot of shared-architectures are utilized to reduce area consumption of the tri-mode equalizer by observing the similarity in the algorithms of the three modes. FPGA is used to implement our design.
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