The Research of Electrical Characteristics of High-k Dielectric -Semiconductor Field-Effect Transistor
碩士 === 國立交通大學 === 電子工程系所 === 96 === As the very large scale integration (VLSI) technology continues to be scaled down, the thickness of gate dielectric has to be decreased for maintaining the capacitance value and drive levels. The gate leakage current increases with decreasing thickness, and the ph...
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ndltd-TW-096NCTU54281092015-10-13T13:51:49Z http://ndltd.ncl.edu.tw/handle/15024662009840774454 The Research of Electrical Characteristics of High-k Dielectric -Semiconductor Field-Effect Transistor 金屬矽化物-高介電常數介電質-半導體場效應電晶體之電性研究 黃俊哲 碩士 國立交通大學 電子工程系所 96 As the very large scale integration (VLSI) technology continues to be scaled down, the thickness of gate dielectric has to be decreased for maintaining the capacitance value and drive levels. The gate leakage current increases with decreasing thickness, and the phenomenon is counter to the mobile device in the technology node. In order to obtain small threshold voltages, we would replace poly-Si gate by metal gate. In this thesis, we improve the electrical characters of FUSI Gate-High gate dielectric-semiconductor MOSFET. We obtain good performance of proper effective work function of 4.95eV (4.25eV) for p- and n- MOSFET respectively, and about 1.6nm EOT. On the other hand, small threshold voltage and good mobility have also been measured. The thermal stability is up to 1000℃ due to the inserted Si. Unfortunately, the Fermi-Level pinning effect still occurs. However, the whole process can be used in the factory. Albert Chin 荊鳳德 2008 學位論文 ; thesis 61 en_US |
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碩士 === 國立交通大學 === 電子工程系所 === 96 === As the very large scale integration (VLSI) technology continues to be scaled down, the thickness of gate dielectric has to be decreased for maintaining the capacitance value and drive levels. The gate leakage current increases with decreasing thickness, and the phenomenon is counter to the mobile device in the technology node. In order to obtain small threshold voltages, we would replace poly-Si gate by metal gate.
In this thesis, we improve the electrical characters of FUSI Gate-High gate dielectric-semiconductor MOSFET. We obtain good performance of proper effective work function of 4.95eV (4.25eV) for p- and n- MOSFET respectively, and about 1.6nm EOT. On the other hand, small threshold voltage and good mobility have also been measured. The thermal stability is up to 1000℃ due to the inserted Si. Unfortunately, the Fermi-Level pinning effect still occurs. However, the whole process can be used in the factory.
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Albert Chin |
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Albert Chin 黃俊哲 |
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黃俊哲 |
spellingShingle |
黃俊哲 The Research of Electrical Characteristics of High-k Dielectric -Semiconductor Field-Effect Transistor |
author_sort |
黃俊哲 |
title |
The Research of Electrical Characteristics of High-k Dielectric -Semiconductor Field-Effect Transistor |
title_short |
The Research of Electrical Characteristics of High-k Dielectric -Semiconductor Field-Effect Transistor |
title_full |
The Research of Electrical Characteristics of High-k Dielectric -Semiconductor Field-Effect Transistor |
title_fullStr |
The Research of Electrical Characteristics of High-k Dielectric -Semiconductor Field-Effect Transistor |
title_full_unstemmed |
The Research of Electrical Characteristics of High-k Dielectric -Semiconductor Field-Effect Transistor |
title_sort |
research of electrical characteristics of high-k dielectric -semiconductor field-effect transistor |
publishDate |
2008 |
url |
http://ndltd.ncl.edu.tw/handle/15024662009840774454 |
work_keys_str_mv |
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