| Summary: | 碩士 === 國立交通大學 === 電子工程系所 === 96 === The analog front-end circuit of burst-mode optical receiver includes the burst-mode transimpedance amplifier (BM-TIA) and the burst-mode limiting amplifier (BM-LA). In the upstream traffic, the optical line terminal (OLT) which receives the data packets from multiple optical network units (ONUs) has very different power levels. Therefore, the burst-mode receiver needs automatic gain control (AGC) and automatic offset cancellation (AOC). Due to the transfer of different data packets, the receiver needs internal reset-creation mechanism. Nowadays, the most popular approach for internal reset creation is to detect the loss of signal (LOS) at the output of TIA during the guard time between data packets. However, the gain of the TIA is too small to guarantee reliable LOS detection. The internal reset signal created by the LA is more reliable due to the increased net gain. Once the reset signal is properly generated, automatic controls of both the gain and the decision threshold can be enabled in a pre-determined procedure. To enable a more efficient integration scheme for reset creation, AGC and AOC, this thesis presents two integrated single-chip burst-mode optical receivers. To improve gain and bandwidth at the same time, negative impedance compensation is adopted in the circuit design. The first one implements a 2.5Gb/s burst-mode optical receiver in TSMC 0.18μm CMOS technology. Measurement results achieve 19dB dynamic range, 93dB�� total differential transimpedance gain, -21dBm sensitivity, 1.55GHz optical bandwidth and fast response time of less than 10ns. This chip dissipates 146mW from a 1.8V supply. The other one implements a 10Gb/s burst-mode optical receiver employing a capacitance cancellation technique in TSMC 90nm CMOS technology. Measurement results achieve 72dB�� total differential transimpedance gain, -13dBm sensitivity and 6GHz optical bandwidth. This chip dissipates 124mW from 1.2V and 3V supply.
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