Study on the Effects of Device Structures and Processes on the Reliability Issues of a-Si:H TFTs

碩士 === 國立交通大學 === 電機學院碩士在職專班電子與光電組 === 96 === In this thesis, the instability issues of a-Si:H TFTs with various device structures and processes after prolonged different gate and drain bias stresses were investigated. It was found that the threshold-voltage shift results from the charge trapping an...

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Main Authors: Chuan-Feng Liu, 劉全豐
Other Authors: Huang-Chung Cheng
Format: Others
Language:en_US
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/02962980429776124026
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spelling ndltd-TW-096NCTU51240652015-10-13T12:18:14Z http://ndltd.ncl.edu.tw/handle/02962980429776124026 Study on the Effects of Device Structures and Processes on the Reliability Issues of a-Si:H TFTs 元件結構和製程條件對非晶矽薄膜電晶體的可靠度之效應研究 Chuan-Feng Liu 劉全豐 碩士 國立交通大學 電機學院碩士在職專班電子與光電組 96 In this thesis, the instability issues of a-Si:H TFTs with various device structures and processes after prolonged different gate and drain bias stresses were investigated. It was found that the threshold-voltage shift results from the charge trapping and state creation is dependence on different conditions. Under gate bias stress only, the threshold-voltage shift is not dependent on channel width of a-Si:H TFTs. However, under high gate and drain bias stress, the threshold-voltage shift increases with enlarging the channel width. Moreover, we studied the instability with different gate and drain bias stresses. Under low fixed gate bias stress, threshold-voltage shift decreases with increasing drain-bias stress; while under high fixed gate- bias stress, the threshold-voltage shift becomes serious as the drain bias stress is large enough. It is due to that self-heating effect causes the instability of a-Si:H TFTs to be serious. To further discuss the self-heating effect, we used different structure of a-Si:H TFTs with W/L=1504μm/4μm such as stripe-like, finger-like, snake-like and multi-channel structures. The experiment results reveal that the stripe-like structure with multi-channel has least threshold-voltage shift than the others after prolonged high gate- and drain-bias stresses. Besides, devices with finger-like structure, we modified different X- and Y-distances between each multi-channel. We found that the modified Y distance has less threshold-voltage as compared to the modified X distance. This phenomenon can be explained by using a simple heat-transferring model. And, we also found if the number of source finger is larger than that of drain finger a-Si:H TFTs with finger-like TFT has less threshold-voltage shift. Moreover, we designed a novel structure with the top metal contacting to source, drain, or gate electrodes and used thicker passivation layer to get normal device operation in the back channel of a-Si:H TFTs. We found the structure with top metal contacting to drain electrode has least threshold-voltage shift among those structures. On the other hand, by changing the thickness of metal as well as the thickness and deposition rate of a-Si:H film, we found that devices with increasing thickness of drain/source have less threshold-voltage shift than both devices with conventional and increasing the thickness of gate metal. We also varied the thickness and deposition rate of a-Si:H film to discuss the reliability issues of a-Si:H TFTs (thicknesses of 150nm and 240nm, deposition rates of 46.2 nm/min and 168 nm/min). It shows that devices with lower a-Si:H deposition rate and thicker a-Si:H thickness have the best reliability. While devices with thicker a-Si:H layer have lower channel current due to its high vertical-channel resistance. We also observed that devices with low deposition rate have turnaround phenomenon of threshold-voltage shift during the negative bias stress, while devices with high deposition rate do not have this issue. Further results reveal that the turnaround phenomenon is greatly influenced by the charge trapped in SiNx and state created in the a-Si:H layer. Finally, we discussed how devices after prolonged positive gate-bias stress can be recovered electrical performance by using a negative gate-bias stress. In our research, we found using negative gate-bias stress can reduce threshold-voltage shift for all devices with varying the a-Si:H-film thickness and deposition rate. Moreover, the reliability of a-Si:H TFTs can be improved by using the multi-channel structure, novel device structure, thicker a-Si:H layer, and lower a-Si:H deposition rate. Huang-Chung Cheng 鄭晃忠 2008 學位論文 ; thesis 81 en_US
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description 碩士 === 國立交通大學 === 電機學院碩士在職專班電子與光電組 === 96 === In this thesis, the instability issues of a-Si:H TFTs with various device structures and processes after prolonged different gate and drain bias stresses were investigated. It was found that the threshold-voltage shift results from the charge trapping and state creation is dependence on different conditions. Under gate bias stress only, the threshold-voltage shift is not dependent on channel width of a-Si:H TFTs. However, under high gate and drain bias stress, the threshold-voltage shift increases with enlarging the channel width. Moreover, we studied the instability with different gate and drain bias stresses. Under low fixed gate bias stress, threshold-voltage shift decreases with increasing drain-bias stress; while under high fixed gate- bias stress, the threshold-voltage shift becomes serious as the drain bias stress is large enough. It is due to that self-heating effect causes the instability of a-Si:H TFTs to be serious. To further discuss the self-heating effect, we used different structure of a-Si:H TFTs with W/L=1504μm/4μm such as stripe-like, finger-like, snake-like and multi-channel structures. The experiment results reveal that the stripe-like structure with multi-channel has least threshold-voltage shift than the others after prolonged high gate- and drain-bias stresses. Besides, devices with finger-like structure, we modified different X- and Y-distances between each multi-channel. We found that the modified Y distance has less threshold-voltage as compared to the modified X distance. This phenomenon can be explained by using a simple heat-transferring model. And, we also found if the number of source finger is larger than that of drain finger a-Si:H TFTs with finger-like TFT has less threshold-voltage shift. Moreover, we designed a novel structure with the top metal contacting to source, drain, or gate electrodes and used thicker passivation layer to get normal device operation in the back channel of a-Si:H TFTs. We found the structure with top metal contacting to drain electrode has least threshold-voltage shift among those structures. On the other hand, by changing the thickness of metal as well as the thickness and deposition rate of a-Si:H film, we found that devices with increasing thickness of drain/source have less threshold-voltage shift than both devices with conventional and increasing the thickness of gate metal. We also varied the thickness and deposition rate of a-Si:H film to discuss the reliability issues of a-Si:H TFTs (thicknesses of 150nm and 240nm, deposition rates of 46.2 nm/min and 168 nm/min). It shows that devices with lower a-Si:H deposition rate and thicker a-Si:H thickness have the best reliability. While devices with thicker a-Si:H layer have lower channel current due to its high vertical-channel resistance. We also observed that devices with low deposition rate have turnaround phenomenon of threshold-voltage shift during the negative bias stress, while devices with high deposition rate do not have this issue. Further results reveal that the turnaround phenomenon is greatly influenced by the charge trapped in SiNx and state created in the a-Si:H layer. Finally, we discussed how devices after prolonged positive gate-bias stress can be recovered electrical performance by using a negative gate-bias stress. In our research, we found using negative gate-bias stress can reduce threshold-voltage shift for all devices with varying the a-Si:H-film thickness and deposition rate. Moreover, the reliability of a-Si:H TFTs can be improved by using the multi-channel structure, novel device structure, thicker a-Si:H layer, and lower a-Si:H deposition rate.
author2 Huang-Chung Cheng
author_facet Huang-Chung Cheng
Chuan-Feng Liu
劉全豐
author Chuan-Feng Liu
劉全豐
spellingShingle Chuan-Feng Liu
劉全豐
Study on the Effects of Device Structures and Processes on the Reliability Issues of a-Si:H TFTs
author_sort Chuan-Feng Liu
title Study on the Effects of Device Structures and Processes on the Reliability Issues of a-Si:H TFTs
title_short Study on the Effects of Device Structures and Processes on the Reliability Issues of a-Si:H TFTs
title_full Study on the Effects of Device Structures and Processes on the Reliability Issues of a-Si:H TFTs
title_fullStr Study on the Effects of Device Structures and Processes on the Reliability Issues of a-Si:H TFTs
title_full_unstemmed Study on the Effects of Device Structures and Processes on the Reliability Issues of a-Si:H TFTs
title_sort study on the effects of device structures and processes on the reliability issues of a-si:h tfts
publishDate 2008
url http://ndltd.ncl.edu.tw/handle/02962980429776124026
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