A QEMU-Based Electronic System Level System Simulation Platform

• Main Authors: Ro-Pun Wong, 黃若鵬
• Other Authors: Chung-Ho Chen
• Format: Others
• Language: en_US
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/87344480947910295641

碩士 === 國立成功大學 === 電腦與通信工程研究所 === 96 === A full system simulation platform is proposed in this thesis. The platform is designed by combining a virtual machine and an electronic system level integrated development environment. Through this platform, we can design a hardware system in an ARM environment or a PCI card in an x86 environment at the electronic system level, boot and run a Linux operating system, and design device drivers and applications as soon as a prototype in hardware is designed. We can also analyze the system performance at a relatively early stage. We have made two case studies with this platform. First, we have offloaded the design of MD5, which is a complex and computational intensive operation in IPsec, in hardware, and designed a device driver, as well as an application to use this hardware. Second, we have developed a network offload environment with this platform. Since developing an efficient network offload environment is a relatively complicated issue, which is related to both the hardware architecture and the kernel communication mechanism between the device driver and the hardware, a complete analysis on the network flow is made, and a communication mechanism is proposed and implemented. We integrated the network offload engine and the device driver, and developed a network example that connects the real world network to our platform, running an FTP application using SCTP protocol.