An Automatic Layout Tool for Fully Differential OPAMPs
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 96 === In this thesis, we developed an automatic layout tool for fully differential OPAMPs. The tool generates circuit layouts of OPAMPs according to their transistor-level synthesis results. Three OPAMP topologies which include two-stage, folded-cascode and two-stag...
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ndltd-TW-096NCKU54422332015-11-23T04:03:11Z http://ndltd.ncl.edu.tw/handle/68109957918850738787 An Automatic Layout Tool for Fully Differential OPAMPs 全差動放大器的自動佈局軟體 Pin-dai Sue 蘇品岱 碩士 國立成功大學 電機工程學系碩博士班 96 In this thesis, we developed an automatic layout tool for fully differential OPAMPs. The tool generates circuit layouts of OPAMPs according to their transistor-level synthesis results. Three OPAMP topologies which include two-stage, folded-cascode and two-stage cascode, are supported by the developed tool. To reduce performance variations caused by layout, some layout schemes, such as matching, dummy and guard ring, are utilized during the procedure of automatic layout. The format of the generated layout is a Tcl/Tk script file which can be sourced into Laker钓 to generate the whole graphic layout. The tool is available for TSMC 0.18贡m 1P6M process. The executing time of automatic layout is within 1 minute. All the automatically generated layouts have been successfully verified by DRC and LVS checks. Soon-jyh Chang 張順志 2008 學位論文 ; thesis 88 en_US |
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碩士 === 國立成功大學 === 電機工程學系碩博士班 === 96 === In this thesis, we developed an automatic layout tool for fully differential OPAMPs. The tool generates circuit layouts of OPAMPs according to their transistor-level synthesis results. Three OPAMP topologies which include two-stage, folded-cascode and two-stage cascode, are supported by the developed tool. To reduce performance variations caused by layout, some layout schemes, such as matching, dummy and guard ring, are utilized during the procedure of automatic layout. The format of the generated layout is a Tcl/Tk script file which can be sourced into Laker钓 to generate the whole graphic layout. The tool is available for TSMC 0.18贡m 1P6M process. The executing time of automatic layout is within 1 minute. All the automatically generated layouts have been successfully verified by DRC and LVS checks.
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Soon-jyh Chang |
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Soon-jyh Chang Pin-dai Sue 蘇品岱 |
author |
Pin-dai Sue 蘇品岱 |
spellingShingle |
Pin-dai Sue 蘇品岱 An Automatic Layout Tool for Fully Differential OPAMPs |
author_sort |
Pin-dai Sue |
title |
An Automatic Layout Tool for Fully Differential OPAMPs |
title_short |
An Automatic Layout Tool for Fully Differential OPAMPs |
title_full |
An Automatic Layout Tool for Fully Differential OPAMPs |
title_fullStr |
An Automatic Layout Tool for Fully Differential OPAMPs |
title_full_unstemmed |
An Automatic Layout Tool for Fully Differential OPAMPs |
title_sort |
automatic layout tool for fully differential opamps |
publishDate |
2008 |
url |
http://ndltd.ncl.edu.tw/handle/68109957918850738787 |
work_keys_str_mv |
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