Summary: | 碩士 === 國立成功大學 === 電機工程學系碩博士班 === 96 === In this thesis, we propose an approximate square prediction criterion for H.264/AVC mode decision. Sum of absolute difference (SAD) and sum of squared difference (SSD) are two popular prediction criteria in the spatial domain. SSD achieves better video quality than SAD due to the square computation. The square operations take high computational complexity and large hardware cost. An efficient mode decision criterion is proposed to maintain the video quality compared to SSD. The proposed criterion much reduces the computational complexity and improves hardware performance by using a first-one-detector and shifter.
Simulation results show the total number of logic gates is 31.2k, and the core size of layout is 435,786 μm2. The proposed intra prediction architecture takes 1,078 clock cycles to predict one macroblock. The proposed architecture using the SASD criterion reduces more than 30% critical time delay compared with that using SSD. The maximum operation frequency is 133 MHz. For the real-time requirement, the maximum frame size achieves 720p HD (1280×720)@30 frames/sec while the sequence format is 4:2:0.
|