Design and Implementation of Context Adaptive Binary Arithmetic Coder in H.264

碩士 === 國立中興大學 === 電機工程學系所 === 96 === In this paper, a parallel 6-symbol Context-Adaptive Binary Arithmetic Coding Architecture is proposed. In context model, in order to solve data dependency, we replace memory with register. In addition, we simplify partial algorithm in H.264 standard.Our renormali...

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Main Authors: Chia-Ming Wan, 萬佳明
Other Authors: Yeong-Kang Lai
Format: Others
Language:zh-TW
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/10261484118700469031
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spelling ndltd-TW-096NCHU54410872016-05-09T04:13:47Z http://ndltd.ncl.edu.tw/handle/10261484118700469031 Design and Implementation of Context Adaptive Binary Arithmetic Coder in H.264 適用於H.264之內文可調適性算術編碼器架構設計與實現 Chia-Ming Wan 萬佳明 碩士 國立中興大學 電機工程學系所 96 In this paper, a parallel 6-symbol Context-Adaptive Binary Arithmetic Coding Architecture is proposed. In context model, in order to solve data dependency, we replace memory with register. In addition, we simplify partial algorithm in H.264 standard.Our renormalization circuit can be done in one cycle while calculating corresponding values for a symbol and saving the execution time. The bottleneck of CABAC is on high data dependency of recursive arithmetic coding. Therefore, we first simulate the maximum symbols per macroblock. Then, we propose a one-symbol arithmetic encoder. Finally, we will present a multi-symbol architecture according to the most symbols per macroblock. Our multi-symbol architecture can process 750 Msymbols per second and work at 125MHZ. Thus, it can achieve the highest throughput in all architectures. The throughput rate is the same as [22]. The chip has been implemented using TSMC 0.18 um 1P6M. Its area size is 1.18x 1.18 mm2. According to the experimental results, the proposed architecture can process 1600 x 1200 and 1280 x 720 resolution pictures in 30 frames per second at 125 MHz and 62.5 MHz, respectively. Therefore, our proposed architecture can be utilized in many mobile video applications. Yeong-Kang Lai 賴永康 2008 學位論文 ; thesis 57 zh-TW
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description 碩士 === 國立中興大學 === 電機工程學系所 === 96 === In this paper, a parallel 6-symbol Context-Adaptive Binary Arithmetic Coding Architecture is proposed. In context model, in order to solve data dependency, we replace memory with register. In addition, we simplify partial algorithm in H.264 standard.Our renormalization circuit can be done in one cycle while calculating corresponding values for a symbol and saving the execution time. The bottleneck of CABAC is on high data dependency of recursive arithmetic coding. Therefore, we first simulate the maximum symbols per macroblock. Then, we propose a one-symbol arithmetic encoder. Finally, we will present a multi-symbol architecture according to the most symbols per macroblock. Our multi-symbol architecture can process 750 Msymbols per second and work at 125MHZ. Thus, it can achieve the highest throughput in all architectures. The throughput rate is the same as [22]. The chip has been implemented using TSMC 0.18 um 1P6M. Its area size is 1.18x 1.18 mm2. According to the experimental results, the proposed architecture can process 1600 x 1200 and 1280 x 720 resolution pictures in 30 frames per second at 125 MHz and 62.5 MHz, respectively. Therefore, our proposed architecture can be utilized in many mobile video applications.
author2 Yeong-Kang Lai
author_facet Yeong-Kang Lai
Chia-Ming Wan
萬佳明
author Chia-Ming Wan
萬佳明
spellingShingle Chia-Ming Wan
萬佳明
Design and Implementation of Context Adaptive Binary Arithmetic Coder in H.264
author_sort Chia-Ming Wan
title Design and Implementation of Context Adaptive Binary Arithmetic Coder in H.264
title_short Design and Implementation of Context Adaptive Binary Arithmetic Coder in H.264
title_full Design and Implementation of Context Adaptive Binary Arithmetic Coder in H.264
title_fullStr Design and Implementation of Context Adaptive Binary Arithmetic Coder in H.264
title_full_unstemmed Design and Implementation of Context Adaptive Binary Arithmetic Coder in H.264
title_sort design and implementation of context adaptive binary arithmetic coder in h.264
publishDate 2008
url http://ndltd.ncl.edu.tw/handle/10261484118700469031
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