Implementation of AES encoder/decoder with FPGA
碩士 === 龍華科技大學 === 電子工程研究所 === 96 === In this thesis, we report the implementation methods of AES encoder/decoder algorithm with Altera FPGA. The theoretical background, data flow, transformations/generations of round keys and the process of encoding/decoding are first reviewed and the corresponding...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/21005168836243667774 |