Study on Nanoimprint Formability for the Polymer Material with self-assembled monolayers using parallel computing technique

• Main Authors: Tu, Jian-An, 涂見安
• Other Authors: Hsu, Quang-Cherng
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/02082605169531780122

碩士 === 國立高雄應用科技大學 === 機械與精密工程研究所 === 96 === This thesis aims at the study of nanoimprint formability for the polymer material with self-assembled monolayer using parallel computing technique. The simulation codes were built based on molecular dynamics (MD) method with the parallel computing technique to observe deformation behaviors of polymer material where stamp with or without self-assembled monolayer. The formability of different forming parameters in atomic scale was studied as well. The study consists of five parts. The adhesion phenomenon was first studied to realize the SAM layer effect on stamp. Second, the temperature effect on formability for nanoimprint was studied. Third, the stamp imprinting speed effect on nanoimprint was studied. Fourth, the nanoimprint process under different aspect ratio of imprint depth to stamp width was studied. Finally, different numbers of CPU in parallel computing scheme was studied to realize the computing efficiency of nanoimprint lithography process, such as 1, 2, 4, 8, 12, and 20 CPUs. According to MD simulation results, stamp without SAM layer behaves severe adhesion phenomenon. Several process conditions, which will result in good formability, such as low temperature, low imprint speed and low aspect ratio were also concluded. The more CPU number means the more efficiency, however, it is not proportional. The efficiency of 20 CPUs is 5.2 times of 1 CPU according to parallel computing results.