Synchronous Rectification Power Converter with Low Standby Power Loss and High Efficiency

• Main Authors: Hsiao-Hua Chi, 紀曉樺
• Other Authors: Sy-Ruen Hw
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/36485470813741014102

碩士 === 逢甲大學 === 資訊電機工程碩士在職專班 === 96 === This thesis investigates the DC/DC converter with low stand-by power consumption and high transfer efficiency. Flyback converter topology has been the first choice for conversion below 100W in modern industry. It great attraction is that it has low cost and simple framework and no output inductor require. The consequent savings in cost and volume is a significant advantage. In heavy load status, the low conducting resistance of MOSFET is used to substitute for the forward voltage drop of output schottky diode to reduce the conduction loss and increase transfer efficiency. When the output is closed to stand-by condition, use the novel current sensing circuit – induction current sensor to close the secondary synchronous rectification driver circuit and reduce the stand-by loss. The contribution of this thesis is to provide a solution of future products for power manufactory to meet European Commission and EPA standard. This thesis studies the operational principle of the Flyback converter and analyzes the test waveform. Finally, the test result is presented to demonstrate that the circuit has the benefits of low stand-by loss and high transfer efficiency, and all the experimental measurement can meet European Commission and EPA standard.