A Programming Methodology for Designing Block Recursive Algorithms

• Main Authors: Min-Hsuan Fan, 范敏玄
• Other Authors: Chua-Huang Huang
• Format: Others
• Language: en_US
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/02350289937419320947

博士 === 逢甲大學 === 資訊工程所 === 96 === Programming methodology is the use of a formal method in specification and construction of algorithms, programs and large software systems. The research of programming methodology is related to distributed systems programming, hardware design, multiprocessor systems, parallel programming. In this thesis, we use tensor product theory to construct a programming methodology for block recursive algorithm. The thesis contains three parts. In the first part, we propose a programming methodology for various block recursive algorithms. Some important computation problems are known as block recursive algorithms. For examples, parallel prefix algorithms, fast Fourier transform algorithms, and matrix transpose algorithms are all block recursive algorithms. We illustrate the parallel prefix and fast Fourier transform computation problems as examples to explain the methodology in details. We show how the tensor product theory can be applied on the research of programming methodology. In the second part, we propose a programming methodology to design a block recursive algorithm on various computer interconnection networks. Tensor product notation has been used to describe some direct and indirect interconnection networks. It allows us generate parallel programs for a specified interconnection network to be possible. We use parallel prefix computation problem as example to illustrate the methodology. We obtain a tensor product formula that represents an algorithm for the parallel prefix problem on the specified network. The networks include hypercube network, omega network, and baseline network. In the third part, we apply the result of parallel prefix algorithm on baseline network to design a parallel prefix adder. We find a circular multistage design for a prefix adder. The design is derived from parallel prefix on baseline network and topological equivalence between baseline network and omega network. Since the special property of omega network, we obtain a circular multistage prefix adder design with area complexity O(N).