Correcting Saturated CT Current Using FPGA Chip Based on Wavelet and Regression
碩士 === 中原大學 === 電機工程研究所 === 96 === In the power protection system, the overcurrent relay employs the secondary current from the current transformer (CT) for evaluating RMS values and then determines the operation action. However, a large current incorporating with DC offset will cause the CT to be s...
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| Format: | Others |
| Language: | zh-TW |
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2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/01802698672219751040 |
| Summary: | 碩士 === 中原大學 === 電機工程研究所 === 96 === In the power protection system, the overcurrent relay employs the secondary current from the current transformer (CT) for evaluating RMS values and then determines the operation action. However, a large current incorporating with DC offset will cause the CT to be saturated when the fault occurs. When the CT saturates, the secondary current becomes distorted and smaller than the actual value. This condition will result in relay malfunction and cause the system unstable or the facility damaged. It will also cause great pecuniary loss. Therefore this thesis develops an overcurrent chip of automatic detecting and correcting saturation of the current transformer.
The wavelet transform is adopted to detect the distortion portion of the CT instantaneous secondary current in each cycle. The starting and ending instants of a distortion period are identified for compensating. The regression method is used to correct distorted waveform. The fuzzy-c-means is combined with statistical hypothesis to classify the fault data into forty-two clusters using Matlab. Forty-two regression formulas are used for testing and on-line application, and the Takagi-Sugeno-Kang fuzzy rules are considered to attain the final inference from the regression outputs. The above wavelet transform, regression method and Takagi-Sugeno-Kang fuzzy rules are designed by using Verilog Hardware Description Language (VHDL) in a Silicon Intellectual Property (SIP) module.
This thesis uses a 161 kV transmission line protection system for simulation by Matlab/Simulink. The overcurrent values are attained from simulation results to validate the precision of the FPGA chip design and verify the function of the designed chip.
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