Current-Cell Matrix Digital to Analog Converter
碩士 === 中華技術學院 === 電子工程研究所碩士班 === 96 === This thesis proposes a new matrix digital to analog converter. All the results are simulated by TSMC 0.18m CMOS technology. The INL and DNL are 0.26 and 0.25 LSB for the 4 bit DAC, respectively. The INL and DNL are 0.23 and 0.25 LSB for the 8 bit DAC, respect...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/27655992063157976458 |