Design of a Three-Dimensional Asynchronous FIFO Using GasP
碩士 === 長庚大學 === 電機工程學研究所 === 96 === Modern SOC (System On Chip) methodology gradually changes all synchronous circuits into GALS. Because data among different synchronous circuits transmit in asynchronous structure, how to make transmit correctly becomes a focal point. This thesis proposes a new FIF...
Main Authors: | Cheng Hsin Lai, 賴政新 |
---|---|
Other Authors: | R. D. Chen |
Format: | Others |
Published: |
2008
|
Online Access: | http://ndltd.ncl.edu.tw/handle/53431909129789965741 |
Similar Items
-
A Dual-Path Square FIFO in GasP
by: Sing-Ren Wang, et al.
Published: (2008) -
A Low Power 1-n-1 Structure FIFO implementation with GasP
by: Ming-Tse Sune, et al.
Published: (2008) -
Asynchronous FIFO design
by: Chih-Ming Chiang, et al.
Published: (2005) -
Design of high reliability and high speed programmable asynchronous FIFO
by: Niu Bo, et al.
Published: (2019-07-01) -
Test Quality Analysis and Improvement for an Embedded Asynchronous FIFO
by: Dubois, Tobias
Published: (2007)