High Performance Packet-based NoC Switch Design with Fair Arbitration Scheme
碩士 === 國立雲林科技大學 === 電子與資訊工程研究所 === 95 === This thesis is based on the utilization of the packet-based switch, to design and implement an efficient network on chip. Network on chip differentiates itself from the concept of ordinary on-chip bus, which uses a shared-bus structure to connect all the IP’...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/54404818342252988128 |