Design of a Real-Time Embedded Software Synthesis Tool for FPGA Systems

• Main Authors: Hong-Lin Hsing, 邢弘霖
• Other Authors: Trong-Yen Lee
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/ew3vz5

碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 95 === In the development for science and technology, the application of FPGA real-time embedded software is more and more various. As the different requirements increasing, the real-time embedded software design for FPGA is much more complicated and difficult. The development of Real-time embedded software synthesis tool is an important key for improvement of software design procedure. In contrast of the hardware synthesis, the software synthesis is very deficient in market. Because of the programmable property for FPGA, many of hardware design constraints are reduced and improved. On the other hand, the real-time embedded software design is required for more complex design and wasting more time. We propose a real-time embedded software synthesis tool for FPGA systems. This tool uses the graphical circulating system model to describe the specification of design software. We design a model analyser to do path scheduling and time estimation. A code generator is designed to generate the software system code that can be executed in MicroBlaze processor system when system model passes the system specification. A verification procedure to prove the accuracy and capability of this software synthesis method is presented. Finally, we use two design examples to verify the correctness of our proposed tool. The first design example is to generate program code for image processing controller to control picture file output and the second design example is a GPS satellite C/A code generator to generate the C/A code of GPS satellites. C/A code can be used to recognize GPS satellite number in GPS system.