Design and Implementation of Filters and Oscillators Based on Current-Mode Active Elements

• Main Authors: Zhao-Hong Huang, 黃照宏
• Other Authors: Yuh-Shyan Hwang
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/kmvh32

碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 95 === The major research of this thesis can be divided into two parts. The first part of this thesis is to implement high order active low pass filter using many kinds of current-mode active element and the linear transformation synthesis method. The design method has following merits：systematic design procedures, simple design equations, minimize active elements, and all grounded resistors and capacitors. The current differencing buffered amplifier circuit is implemented using TSMC 0.35μm 2P4M process whose power supply is ±1.65V, the power consumption is 3.5mW, and the chip area with PAD included is 0.85mm2. The second part, our purpose is to design very low frequency filters and oscillators which can be applied to the design of biomedical chip. Because of the low frequency of biomedical signal, the time constant which the very low frequency circuits need must be very large. This situation will make the resistances and capacitances of very low frequency circuits to be large. It is unfavorable to integrate the circuit due to large resistances and capacitances. This will increase the cost of fabricating biomedical chip. This thesis uses ultra-low transconductance OTA and capacitance multiplication circuit to design very low frequency filters and oscillators. The very low frequency filter is implemented using TSMC 0.35μm 2P4M process whose power supply is ±1.65V, the filter bandwidth is 2Hz, the power consumption is 64μW, and the chip area with PAD included is 1.65mm2. The very low frequency oscillator is implemented using TSMC 0.35μm 2P4M process whose power supply is ±1.65V, all of the capacitors are external the chip for adjusting the oscillation frequency which is from 0.1Hz to 10Hz, the power consumption is 62μW, and the chip area with PAD included is 1.24mm2.