| Summary: | 碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 95 === This thesis investigates encoding / decoding techniques for transmission and reception of wireless data packets via 916.5 MHz RF transceivers. The format of the wireless data packet intended consists of various data fields, including preamble, synchronization header, payload, frame check sequence, stop bit, and guard time.
In the universal asynchronous receive / transmit (UART) mode of operation, the ability of the receiver to accomplish clock and data recovery (CDR) is very critical to the system throughput performance. Since interference and noise over the air is ubiquitous, anti-interference signal transmission / reception is definitely very essential for a reliable digital wireless communication link. Digital signal processing (DSP) techniques via uC-based firmware are utilized to help enhance noise-robustness.
Moreover, 8-bit CRC (cyclic redundancy check) frame checking sequence (FCS) is also embedded in the uC-based firmware in order to incorporate the capability of error detection and thus prevent from false data validation on the receive side. When data security is an indispensable concern, various encryption / decryption techniques with different secret keys can also be included for information securement.
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