| Summary: | 碩士 === 南台科技大學 === 電機工程系 === 95 === The main purpose of this thesis is to use an Field Programmable Gate Array (FPGA) and an embedded NiosII processor to develop a digital servo motion controller IC for X-Y table, which is driven by Permanent Magnet Linear Synchronous Motor (PMLSM). The servo motion controller IC includes two modules. The first module, which performs two PMLSM’s position servo controllers for X-Y table, is implemented by hardware in FPGA. Each position servo controller Intellectual Property (IP) includes an Adaptive Fuzzy Controller (AFC) circuit, Quadrature Encoder Pulse (QEP) capture circuits, Space Vector Pulse Width Modulation (SVPWM) circuits, current read circuit and current vector control circuit. This IP is designed by VHDL language. The second module, which performs the motion trajectory planning for X-Y table, is implemented by software in Nios II processor. The motion trajectory evaluated in this thesis includes the step response, sinusoid response, point to point motion control tracking, circle trajectory tracking, window trajectory tracking, star trajectory tracking and flexuous trajectory tracking, etc. The program in Nios II processor is coded using C language.
The FPGA chip adopts ALTERA Stratix II EP2S60F672C5, which has 48,352 ALUTs , maximum 492 user I/O pins, 36 DSP blocks and total 2,544,192 RAM bits, and an Nios II processor can be embedded into this FPGA chip. Therefore, it is suitable for the development of the servo motion controller of the X-Y table. Finally, an experiment system has been set up in this thesis to verify the effectiveness and correctness of the FPGA-Based Motion Controller for Linear X-Y Table.
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