Design a of low power consumption for using in digital TV.
碩士 === 樹德科技大學 === 電腦與通訊研究所 === 95 === This thesis presents the design and implement a low power consumption for digital TV . The converter circuit uses flyback converter and sense feedback voltage. When the feedback voltage under 2.5V the PWM controller prevents oscillator frequency and output pulse...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/33987974364657753714 |