Research on Silicon Wafers Thinning and Planarization
博士 === 國立臺灣科技大學 === 機械工程系 === 95 === Wafer thinning and chemical mechanical planarization (CMP) process have been widely applied in integrated circuit (IC) fabrication. Due to demands of wafer production, backside thinning before IC packaging and reduction of line width in IC lithography, wafer thin...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/9rk9np |