Fast Packet Classification Using Bit Vector Encoding

碩士 === 臺灣大學 === 電機工程學研究所 === 95 === Packet classification plays an important role in many network applications, like firewall, quality of service, virtual private networks, etc. This paper proposes a method to encode bit vector, called EBV scheme, in order to reduce the length of bit vectors whi...

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Main Authors: Ching-Fu Kung, 龔景富
Other Authors: Sheng-De Wang
Format: Others
Language:zh-TW
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/05848421137960481374
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spelling ndltd-TW-095NTU054421682015-10-13T13:55:54Z http://ndltd.ncl.edu.tw/handle/05848421137960481374 Fast Packet Classification Using Bit Vector Encoding 使用位元向量編碼的快速封包分類法 Ching-Fu Kung 龔景富 碩士 臺灣大學 電機工程學研究所 95 Packet classification plays an important role in many network applications, like firewall, quality of service, virtual private networks, etc. This paper proposes a method to encode bit vector, called EBV scheme, in order to reduce the length of bit vectors which are basic data structure of Lucent BV scheme. The advantages of compressing bit vectors include lowering the memory space requirement and reducing the memory access times when reading bit vector information from memory. When evaluating the performance, we use the ClassBench, rule set generation tool, to generate nine different rule sets. Testing result shows that the proposed EBV scheme needs a smaller memory storage than the Lucent BV scheme and by using parallel processing in hardware, searching rules with the EBV scheme needs about half of memory access times that are required with the Lucent BV scheme. We use a Xilinx Vertex4 FX-20 FPGA platform to implement the EBV scheme. With 64-byte packets and rule sets with about 1K rules, the EBV scheme can filter packets up to 500Mbps using a three-stage pipeline architecture and 1Gbps using a five-stage pipeline architecture. Sheng-De Wang 王勝德 2007 學位論文 ; thesis 46 zh-TW
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description 碩士 === 臺灣大學 === 電機工程學研究所 === 95 === Packet classification plays an important role in many network applications, like firewall, quality of service, virtual private networks, etc. This paper proposes a method to encode bit vector, called EBV scheme, in order to reduce the length of bit vectors which are basic data structure of Lucent BV scheme. The advantages of compressing bit vectors include lowering the memory space requirement and reducing the memory access times when reading bit vector information from memory. When evaluating the performance, we use the ClassBench, rule set generation tool, to generate nine different rule sets. Testing result shows that the proposed EBV scheme needs a smaller memory storage than the Lucent BV scheme and by using parallel processing in hardware, searching rules with the EBV scheme needs about half of memory access times that are required with the Lucent BV scheme. We use a Xilinx Vertex4 FX-20 FPGA platform to implement the EBV scheme. With 64-byte packets and rule sets with about 1K rules, the EBV scheme can filter packets up to 500Mbps using a three-stage pipeline architecture and 1Gbps using a five-stage pipeline architecture.
author2 Sheng-De Wang
author_facet Sheng-De Wang
Ching-Fu Kung
龔景富
author Ching-Fu Kung
龔景富
spellingShingle Ching-Fu Kung
龔景富
Fast Packet Classification Using Bit Vector Encoding
author_sort Ching-Fu Kung
title Fast Packet Classification Using Bit Vector Encoding
title_short Fast Packet Classification Using Bit Vector Encoding
title_full Fast Packet Classification Using Bit Vector Encoding
title_fullStr Fast Packet Classification Using Bit Vector Encoding
title_full_unstemmed Fast Packet Classification Using Bit Vector Encoding
title_sort fast packet classification using bit vector encoding
publishDate 2007
url http://ndltd.ncl.edu.tw/handle/05848421137960481374
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