A System Design Methodology for Concurrency from UML to SystemC

碩士 === 國立臺灣大學 === 電機工程學研究所 === 95 === Increasing demands for more performance have taken the system designs based on VLSI chips to their limits. The design bottleneck now is the interconnect delays and power consumptions rather than the basic gate delays. One way to eliminate the latency and power c...

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Main Authors: Chi-Wei Lin, 林其蔚
Other Authors: Sheng-De Wang
Format: Others
Language:en_US
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/92220894024871844698
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spelling ndltd-TW-095NTU054420722015-12-07T04:04:10Z http://ndltd.ncl.edu.tw/handle/92220894024871844698 A System Design Methodology for Concurrency from UML to SystemC 結合UML與SystemC針對同作行為的系統設計方法論 Chi-Wei Lin 林其蔚 碩士 國立臺灣大學 電機工程學研究所 95 Increasing demands for more performance have taken the system designs based on VLSI chips to their limits. The design bottleneck now is the interconnect delays and power consumptions rather than the basic gate delays. One way to eliminate the latency and power consumptions of accessing data external to the chip is putting all the various VLSI components into a single chip. It leads to the design paradigm of System-On-Chip (SOC), in which all the functionality of a complete system is put into a single silicon die, including both the software and hardware components. As the process of SOC design is getting more and more complicated, raising the abstraction layer can help system designers focus on the essential elements of the design. Since the SystemC language has already provided several layers of abstraction, systems to be constructed can initially be designed in the software-based un-timed functional models and further be refined to lower abstraction level to get the more detailed design. However, by the assistance of the United Modeling Language (UML), which is commonly used in designing software systems, the highest level of abstraction provided in SystemC can even be raised. Based on the idea of raising the abstraction level of the SystemC language by the UML, a methodology for system level design is proposed to realize the designing process for concurrency: An UML profile that catches the hardware-oriented characteristics of SystemC is constructed in the thesis, which is implemented subsequently on the chosen Computer Aided Software Engineering (CASE) tools ‘Enterprise Architect’ and ‘Microsoft Visual Studio .NET 2003’. System-On-Chip (SOC) designs can thus be built based upon the constructed UML profile for SystemC and the source codes of SystemC can be generated automatically through the templates for code generation. Two case studies that both have concurrent behaviors are given in the last to illustrate the proposed process of SOC design, simple verifications and simulations are carried out as well. Sheng-De Wang 王勝德 2007 學位論文 ; thesis 136 en_US
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description 碩士 === 國立臺灣大學 === 電機工程學研究所 === 95 === Increasing demands for more performance have taken the system designs based on VLSI chips to their limits. The design bottleneck now is the interconnect delays and power consumptions rather than the basic gate delays. One way to eliminate the latency and power consumptions of accessing data external to the chip is putting all the various VLSI components into a single chip. It leads to the design paradigm of System-On-Chip (SOC), in which all the functionality of a complete system is put into a single silicon die, including both the software and hardware components. As the process of SOC design is getting more and more complicated, raising the abstraction layer can help system designers focus on the essential elements of the design. Since the SystemC language has already provided several layers of abstraction, systems to be constructed can initially be designed in the software-based un-timed functional models and further be refined to lower abstraction level to get the more detailed design. However, by the assistance of the United Modeling Language (UML), which is commonly used in designing software systems, the highest level of abstraction provided in SystemC can even be raised. Based on the idea of raising the abstraction level of the SystemC language by the UML, a methodology for system level design is proposed to realize the designing process for concurrency: An UML profile that catches the hardware-oriented characteristics of SystemC is constructed in the thesis, which is implemented subsequently on the chosen Computer Aided Software Engineering (CASE) tools ‘Enterprise Architect’ and ‘Microsoft Visual Studio .NET 2003’. System-On-Chip (SOC) designs can thus be built based upon the constructed UML profile for SystemC and the source codes of SystemC can be generated automatically through the templates for code generation. Two case studies that both have concurrent behaviors are given in the last to illustrate the proposed process of SOC design, simple verifications and simulations are carried out as well.
author2 Sheng-De Wang
author_facet Sheng-De Wang
Chi-Wei Lin
林其蔚
author Chi-Wei Lin
林其蔚
spellingShingle Chi-Wei Lin
林其蔚
A System Design Methodology for Concurrency from UML to SystemC
author_sort Chi-Wei Lin
title A System Design Methodology for Concurrency from UML to SystemC
title_short A System Design Methodology for Concurrency from UML to SystemC
title_full A System Design Methodology for Concurrency from UML to SystemC
title_fullStr A System Design Methodology for Concurrency from UML to SystemC
title_full_unstemmed A System Design Methodology for Concurrency from UML to SystemC
title_sort system design methodology for concurrency from uml to systemc
publishDate 2007
url http://ndltd.ncl.edu.tw/handle/92220894024871844698
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