| Summary: | 碩士 === 臺灣大學 === 電子工程學研究所 === 95 === In this thesis, the motivation, challenges, and solutions of burst-mode receiver (BMRX) for passive optical networks (PONs) are presented.
The need for optical receiver is explained first. Then, the basic architecture of a PON is introduced so that the need for BMRX can be understood. The motivation and the specifications related to burst-mode clock and data recovery (BMCDR) circuits are also introduced.
The existing BMCDR circuits are classified into three categories in this thesis. After introducing every category, a comparison in view of achievable data rate, locking time, power, area, and jitter performance is made. Summarizing the comparisons, the challenges manifest clearly.
The first work is a burst-mode transimpedance amplifier (BMTIA), utilizing excessive-bottom-hold circuit. This 10Gb/s BMTIA behaves quick settling time (10bits), wide dynamic range (42.5dB), and low power consumption (7.2mW). This circuit is implemented in a standard 0.13um CMOS process and the area is 1.2756 x 0.625 mm2.
The second work is a quarter-rate burst-mode clock and data recovery (BMCDR) circuit, utilizing gated voltage-controlled oscillator (GVCO) and data-rising-edge extractor. The quarter-rate operation makes this BMCDR to work at 10Gb/s with low power consumption and no inductor is used. This circuit is implemented in a standard 0.13um CMOS process and the area is 1.461 x 1.291mm2.
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