Investigation of Strain-Temperature Stress Effects on the Characteristics of MOS Capacitors with Ultra-thin Gate Oxides

• Main Authors: Wei-Ting Chen, 陳偉庭
• Other Authors: 胡振國
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/29739158998042809078

碩士 === 國立臺灣大學 === 電子工程學研究所 === 95 === With the scaling of MOS devices, the thickness of oxides becomes thinner. Nevertheless, dielectrics are requested to have higher ability to withstand the current. Therefore, it becomes an important topic to promote the quality of silicon-dioxide dielectrics. However, the increasing of power densities cause thermal and stress issue more seriously. In this thesis, we studied the effects of strain-temperature stress on the electrical characteristics of MOS devices with gate oxides grown by different techniques, and tried to promote the oxide quality by the proposed method. From the experimental results, we found that suitable tensile strain-temperature stress would promote the quality of MOS gate oxides. The electrical characteristics on tensile strain-temperature stress are investigated. While observing the C-V characteristics of MOS (n) capacitors, we found that the gate capacitance came to negative at low measured frequency. We infer the phenomenon is related to the gate leakage current by kinds of analyses. Thus, after tensile strain-temperature stress, the negative capacitance phenomenon can be reduced.