| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 95 === As technology shrinks to nanometer eras, coupling capacitances between adjacent wires grow rapidly, and have a significant impact on signal integrity of an integrated circuit. In this thesis, we propose an algorithm for merging the simultaneous switching behavior on a general bus. First of all, we find there is indeed data dependency on data bus. Due to the Miller Effect considering data dependency, we minimize the coupling capacitance induced between adjacent wires. By analyzing the data transmitted on data bus, we reduce the numbers of the worst case of the switching patterns through wire reordering. Experimental results demonstrate that we can achieve 5% improvements on average in the bin files, 4.3% in the .pdf files, and 20% in the .txt files.
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