| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 95 === Among the verification tasks of sequential circuits, FSM initialization is one of the most important problems. It ensures that a sequential circuit starts from a correct initial state. In this thesis, we are concerned with the initialization problem for sequential circuits. More specifically, we would like to ensure that a given sequential circuit is initialized properly while the number of explicit-reset registers is minimized or, equivalently, the number of implicit-reset registers is maximized. Essentially, given a length upper bound on the reset sequence, we compute a minimal set of explicit-reset registers along with a valid reset sequence of the circuit. We present two novel methods and techniques for initializing the circuit. The first method uses a structural-based technique. We show that the explicit-reset minimization problem can be formulated using graph theory. Depending on the upper bound of the reset-sequence length, minimizing explicit-reset registers may correspond to different graph problems. The second method uses a hybrid approach combining the structural-based method with Pixley’s resetability analysis of state-based method. Because the state traversal can be done in a reduced space with respect to a selected set of explicitreset registers, the state explosion problem can be much alleviated. Experiments show promising results for our proposed methods.
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