| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 95 === In recent years, the improvement in wireless communication equipments speeds up the progress of digital life. Cell phone is an obvious example: everyone has a cell phone. The function of the cell phone tends to be versatile; it is not only used in internet but also used in taking care of home security. Thus, the WiMax protocol in wireless communication is always used. The Wimax needs high speed data rate and a high speed and high resolution ADC is required in the protocol.
Due to the portable equipments, low power is an important issue. But it conflicts between high speed and low power. Thus, it is an interesting topic to research in high speed and low power ADC.
Pipelined ADC is always used in ADC with resolution larger than 10 bits and speed higher than 200MS/s. We wish to design a 1.2V 10-bit 250MS/s ADC, thus, a time-interleaved pipelined ADC architecture is chosen.
Chapter 1 reviews the pipelined ADC architecture and introduces the errors in pipelined ADC. Chapter 2 discusses the time-interleaved ADC and the mismatch effects in time-interleaved ADC. A proposed architecture to increase conversion speed is given in Chapter 3 and the building blocks are also explained. Chapter 4 presents the test setup and measurement result. Final is a conclusion.
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