Organic thin film transistor

• Main Authors: Yi-Ming Chen, 陳逸銘
• Other Authors: 黃建璋
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/92956758326867871048

碩士 === 國立臺灣大學 === 光電工程學研究所 === 95 === Organic thin film transistors (OTFTs) have attracted much attention because of the advantages of low-cost, large-area and flexible-substrate capability which can be widely used in the applications such as radio frequency identification tags, electronic papers, and flexible display. Although a lot of research groups focus on organic material synthesis, a self sustained electrical model for such devices is far from perfect right now. To understand the electrochemistry of organic materials and find the solution of stabilities of organic materials, a complete modeling and research on DC and AC is needed. In this paper, we started our simulations from the basic current-voltage equations of a semiconductor metal-oxide-semiconductor (MOS) device to build the DC modeling and extract the parameters. Comparing the differences between the organic and semiconductor devices, we found that, in an OTFT, the current-voltage characteristics are quite different from that in a semiconductor-MOS, and we developed the petacene grain size model to explain the experiment. And we perform DC stress to investigate the stability of organic material. And we try to investigate the variations of physical and modeling parameters that respond to AC current changes. Therefore, starting from small signal and large signal AC models, we built up the macroscopic AC response models from carrier point of view, which is essential to AC modeling since the polystalline property of OTFTs hasn''t been considered in AC model previously. Furthermore, we perform AC stress test to study the device failure mechanism. The results will be helpful to identify better material and device structures. Finally, we carry out the quasi-stable C-V test in a pentacene OTFT. The quais-stable C-V is a low frequency test to realize carrier transport behaviors under different applied voltages, swing durations and gate channel sizes. Our results indicate that carrier trap and de-trap process will affect the C-V profiles under different stress.