The Study of CMOS Shallow Trench Isolation Step-height for Device Characteristics
碩士 === 國立清華大學 === 工程與系統科學系 === 95 === This research studies the effect on device performance from the step-height difference between Shallow Trench Isolation (STI) and its neighboring transistor active-region in Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The study utilizes the two m...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2007
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Online Access: | http://ndltd.ncl.edu.tw/handle/37622253468231688097 |