| Summary: | 碩士 === 國立清華大學 === 產業研發碩士積體電路設計專班 === 95 === We present a Universal Multicasting Scan (UMC-Scan) architecture for test compression. With some hardware support, this scheme allows universal multicasting by which we mean that one is able to shift in a test pattern to arbitrary set of scan chains as long as they are compatible. It does require the addition of some extra control bits padded to the compressed test pattern. However, by incorporating techniques such as control pattern encoding, skipping, and partial data reuse, we will demonstrate that the control overhead can be reduced to a modest level. For the first time, we reported experimental results approaching the maximum test compression ratio allowed by the popular multicasting methodology.
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