Investigation of the Mechanical Stress-Induced Shift and Variation of Electrical Characteristics in the Analogic Device and MOSFETs

• Main Authors: Hsiao-Tung Ku, 顧曉東
• Other Authors: Kao-Ning Chiang
• Format: Others
• Language: en_US
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/28031994899465126048

博士 === 國立清華大學 === 動力機械工程學系 === 95 === Recently, the integrated circuit trends to have more and more complex with multi-functions but smaller and smaller in size. For this reason, it needs much more exact calculation and desination for electrical characteristics. Poor design and process-induced mechanical stress effect cause serious problem during fabrication stages, especially for the packaging process in the front-end process, which make more variation to electrical characteristics and affect the quality and performance of the device in the end. Mechanical stress induced unstable and variation of electrical characteristics is one of the major factors to affect the entire performance of a device seriously. So, the mechanical stress always the most important and urgent factor to be deeply investigated. In order to understand the variation of electrical characteristics under the mechanical stress effect in the chip, two different research topics, package and device level, were investigated in this research. In package level, four different samples, polyimide with/without polymer coated and non-polyimide with/without polymer coated, in low-dropout chips were all packaged into two different packages, small outline package and quad flat non-lead package. In this level, overall eight different samples were prepared and submitted to experiment. In the device level, N- and P-MOSFETs were prepared for investigation the relationship between the mechanical stress effect and electrical characteristics. In package level, the variation of chip output voltage is smaller when with stress buffer layer (polyimide or polymer) but was larger when chip without any stress buffer layer. The chip was seriously affected by the package-induced mechanical stress in a package with unsymmetrical geometry, as the output voltage variation was larger. Because the polyimide coating was applied on surface of whole wafer in the front-end wafer fabrication, the capability of the stress buffer was weaker due to the thickness of the polyimide layer was only few micometers thin. Furthermore, the polymer coating was applied on the chip one by one in the back-end packaging process, the advantage is the capability of the stress buffer was stronger due to the thickness of the polymer layer is from decades to hundred of micrometers, the drawbacks are unsuotable for the small package. In device level, both in N- and P-MOSFETs, their electrical characteristics are more sensitive to the mechanical stress when the direction of the device channel (current flow) was parallel to the orientation of applied mechanical stress, which then caused high variation of the drain current. In addition, for N-MOSFETs, the drain current variation is small when the direction of the device channel was perpendicular to the orientation of applied mechanical stress. However, for P-MOSFETs, smallest drain current variation occurred when the angle is in ±45 degrees, the slope was similar to the horizontal. In the IC design field, for obtaining the minimum mobility variation under the applied mechanical stress, the best layout of the direction of N-MOSFETs was the device channel perpendicular to the orientation of applied mechanical stress, but in ±45 degrees for P-MOSFETs. The threshold voltage variations of all samples under different mechanical stresses were under 0.5%, that means the threshold voltage was almost not affected by mechanical stress. The experimental results of the drain current variation and threshold voltage variation in this research were well agree with prior studies, the slight subtle difference could be attributed to the gate-oxide variation, different doping concentration and measuring error and others. My research provides a very useful design guideline of MOSFETs for the integrated circuit and a criterion of package design and selection to reduce the mechanical stress effect to improve the performance of the chip, which is very valuable in both academic and economic applications. Furthermore, a series of originative models on mechanics are developed from this research for describing the carrier mobility change of MOSFETs under mechanical stresses. The originative models in this research on mechanics provide more concise and clear descriptions of physical models for the change of the carrier mobility in MOSFETs. Therefore, the models might easier be understood than the general energy band models.