An Efficient ADI-FDTD Scheme for Processing Lumped Multi-port Devices
碩士 === 國立中山大學 === 通訊工程研究所 === 95 === When the conventional FDTD method is applied to the high-frequency planar circuits, the time step must be very small due to the CFL stability criterion since the structural details of the circuits are usually very small. These results in a prohibitively high comp...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/48843020505208423203 |
| Summary: | 碩士 === 國立中山大學 === 通訊工程研究所 === 95 === When the conventional FDTD method is applied to the high-frequency planar circuits, the time step must be very small due to the CFL stability criterion since the structural details of the circuits are usually very small. These results in a prohibitively high computation time since the simulation takes a long time to stabilize. This thesis will focus on implementing an ADI-FDTD algorithm suitable for the analysis and simulation of large-scale high-frequency planar circuits. Realization of the lumped elements befitting the ADI-FDTD algorithm will be developed. Furthermore, active devices will then be incorporated into the algorithm once the models for lumped elements are built up.
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