Design and Analysis of Compact Square-Root-Domain Filters

• Main Authors: Meng-yang Cheng, 鄭盟揚
• Other Authors: Chia-Hsiung Kao
• Format: Others
• Language: en_US
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/xv3tp8

碩士 === 國立中山大學 === 電機工程學系研究所 === 95 === In this thesis, a second-order low pass square root domain filter (SRD filter) based on operational transconductors amplifiers (OTAs) is presented. The SRD filter consists of two translinear filters and four OTAs. Because the OTA has small voltage swings, which may violate the large signal natural of the SRD filter. We investigate the dynamic range of this compact SRD filter with different quality factor(Q). The circuit has fewer numbers of transistors and operate in low voltage, therefore, it has less power consumption and less chip area. The circuit has been fabricated with 0.35μm CMOS technology. It operates with a supply voltage 1.5V and the biasing current varies from 10uA to 80uA. Measurement results lts show that Im/I0≥40% when the external capacitance C is 3.5pF、7pF and Im/I0≥53% when the external capacitance C is 3pF、8.5pF. The cutoff frequency of the filter can be tuned from 1.24MHz to 5.53MHz when the external capacitance C is 3.5pF、7pF and the cutoff frequency can be tuned from 900KHz to 4.46MHz when the external capacitance C is 3pF、8.5pF. The total harmonic distortion is 0.908% and the power consumption is 506μW.