Integration of Memory Subsystem with Microprocessor Supporting On-Chip Real Time Trace Compression
碩士 === 國立中山大學 === 資訊工程學系研究所 === 95 === In this thesis, we integrate the memory subsystem, including cache and MMU(Memory Management Unit) with the embedded 32 bits microprocessor SYS32TM-II to support the virtual memory mechanism of the operating system and make memory management effectively among m...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2007
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Online Access: | http://ndltd.ncl.edu.tw/handle/asknc6 |