The Chip Design of Image Signal Rejection and Mixer Technique in Wireless DTV

• Main Authors: Kuan-ting Lin, 林冠廷
• Other Authors: Shih-chang Hsia
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/84007283866498718521

碩士 === 國立高雄第一科技大學 === 電腦與通訊工程所 === 95 === In this thesis, we design an active mixer and polyphase filter for the tuner of DTV front-end system. The decoding tuner is to modulate a high frequency to an intermediate frequency for the video in each program channel. To keep low complexity, the single conversion structure is adopted, which consists of one Quadrature local oscillation (QLO), one mixer and two polyphase filters. We improve the conventional polyphase filter with active approach. Some of pass components (capacitors and resistors) can be replaced with inverters. The advantages are that not only the chip area can be reduced but also the signal level can be gained. In the prototyping implementation, the current frequency bands of Taiwan’s channels are referred, where frequency range is from 530MHz to 602MHz for the DTV programs. The system is simulated with ADS RF simulator. The technology is mapped to TSMC 0.35μm CMOS process. After simulations, the polyphase filter can reject the image frequency above 40dB when combining with an active mixer and QLO. The main signal can be gained about 5~10dB. According to the parameters of ADS simulations, the silicon chip is designed with full custom layout. The chip size is about 0.09 mm2, and the maximum power dissipation is 233 mW when works on the center frequency 566MHz.