Study and Realization of an FPGA-Based Induction Motor Driver

• Main Authors: Zheng-Cheng Chou, 周正晟
• Other Authors: Shyh-Shing Perng
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/54036726686602459770

碩士 === 國立宜蘭大學 === 電機工程學系碩士班 === 95 === Abstract This thesis is the study and realization of an FPGA-based Induction Motor driver. The control rules that are used in this thesis are pure measure control rules and vector control rules. As in reality uses the Xilinx Virtex-II XC2V250 large FPGA chip, and carry out by the software mode and hardware mode. In order to simplify the design and minimize the circuit’s complexity, the module form is used to design the program. In the software mode, a 16-bits DSP core is designed into an FPGA chip, and use assembly language to write the control rules of the driver that’s in the module. Then sort every individual module into an intact framework, which accomplish the fabrication of using software mode to complete the Induction Motor drives. In the hardware mode, the control rules of the driver will not be designed through the DSP core, although the circuit might be more complicated, but it can save FPGA chip a great amount of resources. The control circuit, drive circuit, speed sensor circuit, and current sensor circuit are all designed by VHDL. The control circuit is still designed by modulating. To increase the circuit’s calculating precision, the numerical calculation of the hardware mode and software mode are both using the method of 16-bits signed 2’s to design. Then take the result of the software mode and the hardware mode to make analysis and comparison, in order to achieve the purpose of using FPGA materializing the Induction Motor drives. The result of the experiment in this thesis reveals that, through a single FPGA chip to materialize the Induction Motor drives of the software mode and the hardware mode, can both reach great efficiency. Which practically proves the feasibility of FPGA materialize the Induction Motor drives of either software mode or hardware mode. Provide a fine embryo for all sorts of motor control method of FPGA microchip’s design in the future. Keywords：IM, Pure measure control, Vector control, FPGA, VHDL