| Summary: | 碩士 === 國立中央大學 === 電機工程研究所 === 95 === This thesis is about that proceeding with the research for the ESD protection ability to the Schottky diode layout parameter of GaAs. According to the result of ESD test, we can find that the gate periphery of the diode and HBM voltage can be direct proportion. While the gate width is 37.5 μm, gate length is 1.5 μm , the Gate Finger Number is 8, the voltage of the ESD test can be up to more than 1250 voltage for the HBM voltage. We also do the simulation and prove to the heat effect of the diode. To make optimized Schottky Diode of the GaAs be applied in the micro-wave switch of GaAs pHEMT. According to the result, the insertion loss is under 1.1dB, isolation is over 33 dB, power handling capability(P1dB)(OFF state) is above of 1W(30dBm), the area is 0.3-mm2. Through the ESD-HBM test at the same time, the ESD bearing ability reaches above 1000V.
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