High Output-Power High Linearity CMOS Class AB Audio Amplifier with Quiescent Current Control

• Main Authors: Hsu-Yu Huang, 黃旭右
• Other Authors: Chung-Yu Wu
• Format: Others
• Language: en_US
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/81598010065314529844

碩士 === 國立交通大學 === 電機學院通訊與網路科技產業專班 === 95 === With the advent of a highly-mobilized and individualized multimedia age, Class-D audio amplifiers with better power efficiency, among the applications of its kind, have gained a lot of attentions. However, in view of the fact that traditionally high output power, good linearity, and low distortion are expected in amplifiers alike, Class-D audio amplifiers may not be an ideal choice since it requires a complicated clock modulation or a compensatory control mechanism to make up to its poor output linearity. To look for an applicable alternative, therefore, this thesis puts forth a Class-AB linear audio amplifier that not only meets the design specification of business application, but also equips with features such as volume control, earphone output ports, short-circuit protection, and other functions desired in a multimedia product. In general, a linear audio amplifier has a load impedance of approximately 8 ohm, so its output stage must have a compatibly large current drive, whose design has a significant influence on the quiescent current, power efficiency, and linearity. These deciding factors in designing a linear audio amplifier thus reveal the originality of this thesis: to rid the unwanted quiescent current of the output stage and unstable linearity resulted from process variation with a succinct structure. The Class-AB output stage adopts common-source power transistors with error amplifiers. By decreasing the gain of the error amplifier, the quiescent current is successfully controlled. Since the gain of the error amplifier will increase as the output power rises, it will therefore enhance the linearity. Besides, its output common mode range is the same as the supply voltage, which is sufficient enough to drive a smaller-sized power transistor to achieve the desired output power. The chip is fabricated by the UMC 0.5um +/-20V2P2M high voltage process. It could undertake a high supply voltage ranging from 10V to 18V. The total harmonic distortion is approximately 0.060 % provided that the load impedance is 8 ohm and the output power is 2 watt under an 18V supply voltage.