BW/Gain Tunable Low Noise Front-End IC Design for Portable Bio-Signal Acquisition System

• Main Authors: Chun-Chieh Huang, 黃俊傑
• Other Authors: Chin-Teng Lin
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/23704798787008028502

碩士 === 國立交通大學 === 電機與控制工程系所 === 95 === Due to low-amplitude and non-stationary properties, most of biomedical signals are easy to be influenced by examined persons, measured environment, and electronic devices. The objective of this thesis is to propose a novel analog circuit design, which is suitable for various biomedical signal acquisitions. In addition to the consideration of low power and low noise, the analog front-end integrated circuit (AFEIC) is presented with design of high common-mode rejection ratio (CMRR) and high power supply ripple rejection ratio (PSRR). This circuit was realized into a single chip without any external component. It can not only reduce the number of outer components, but also greatly enhance a better signal-to-noise ratio. In addition, to select system gain and bandwidth corresponding to different amplitude and frequency of biomedical signals, the digital controllable interface was also designed and integrated into AFEIC. In this thesis, AFEIC design includes one current-balancing instrumentation amplifier (CBIA), one switching capacitance filter (SCF), one non-overlapping clock generator, and one programmable gain amplifier (PGA). These circuits have been integrated into a single chip of the total area of 0.907�e1.129mm2 by using TSMC 0.35�慆 CMOS 2P4M standard process. For the simulation results, the proposed chip can achieve 155 dB of CMRR, 131 dB of PSRR+, and 127 dB of PSRR- at 50 Hz. The power consumption is about 142.4 �巰 under �b1.5V supply.